Semiconductor Engineering

Asynchronously Parallel Optimization Method For Sizing Analog Transistors Using Deep Neural Network Learning

A new technical paper titled “APOSTLE: Asynchronously Parallel Optimization for Sizing Analog Transistors Using DNN Learning” was published by researchers at UT Austin and Analog Devices. “Analog ...
Semiconductor Engineering

DNN-Opt, A Novel Deep Neural Network (DNN) Based Black-Box Optimization Framework For Analog Sizing

This technical paper titled “DNN-Opt: An RL Inspired Optimization for Analog Circuit Sizing using Deep Neural Networks” is co-authored from researchers at The University of Texas at Austin, Intel, ...